摘要
文章介绍了基于FPGA进行的电子秒表的设计.首先介绍了总体设计方案,接着分别从顶层文件设计和子模块设计两方面详细介绍了设计过程,最后对用硬件描述语言编程仿真中应该注意的问题做了一个小结.
The design of the electronic stopwatch based on FPGA is described in this arti- cle. The whole design scheme is firstly introduced, then the design process is detailed separately from the top-level file and sub-module design aspects. Finally the problem encountered in the simulation process with the hardware description language is made a summary.
出处
《太原师范学院学报(自然科学版)》
2014年第3期44-48,共5页
Journal of Taiyuan Normal University:Natural Science Edition