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异构SoC图形器中可编程剪裁器的设计与实现 被引量:1

Design and implementation of programmable clipper in heterogeneous SoC
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摘要 随着图形处理性能的不断提升,图形处理的运算量也日益增多,传统的嵌入式系统面临着挑战。解决这一问题的方案之一是运用可编程器件开发适用于嵌入式系统的图形处理器,从而提高处理速度。现代图形处理器采用各种可编程的着色处理器,虽然ASIC的速度和功耗性能优于可编程处理器,但其灵活性与可靠性却是无法与可编程处理器比拟的。采用一种带精简指令的微控制器架构,重点研究用汇编和可编程处理器协同实现平面剪裁功能,代替原来用纯硬件实现的功能,该流水线执行多指令多数据流(MIMD)。最后,使用大量的测试用例对点、线和三角形在FPGA开发板上进行相应的验证。 With the continuous improvement in graphics processing performance, the computation of graphics processing is also increasing day by day, and the traditional embedded system is facing challenges. One solution to this problem is to use a pro- grammable device development for embedded system graphics processors to improve processing speed. Modern graphics processors use a variety of programmable shader processors. Although the speed and power performance of ASIC are better than that of pro- grammable processor, its flexibility and reliability are unable to the programmable processor. In this paper, a micro-controller with a RISC architecture focuses on using assembly and programmable processor together to achieve the plane clipping function, instead of the function that the pure hardware implements. What's more, the pipeline executes the multiple instruction multiple data stream(MIMD). Finally, it uses a large number of test points, lines and triangles in the FPGA development board to do the corresponding verifying.
出处 《电子技术应用》 北大核心 2015年第2期51-54,共4页 Application of Electronic Technique
基金 国家自然科学基金重点资助项目(61136002)
关键词 可编程 平面裁剪 图形处理器 微控制器 流水线 programmable plane clipped graphics processor micro-controller the pipelined
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参考文献4

  • 1王浩鹏.二维图形的裁剪算法研究与改进[D].西安:西安电子科技大学,2011.
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