基于FPGA的多操作位逻辑运算控制器的设计

Design of Logic Operation Controller for Multioperand Based on FPGA

提出了应用FPGA设计可执行多操作位逻辑运算控制器的思路,该控制器接收到逻辑运算命令与多操作位后,在内部时序脉冲作用下,可以自主完成PLC逻辑运算指令的功能,运算结果传输到系统数据总线。设计多操作位逻辑运算的PLC指令,论述了该控制器的电路构成和基本原理,分析指令在内部时序脉冲作用的执行过程并给出了流程图,应用Verilog HDL语言实现相关硬件的构建和连接,应用梯形图程序进行仿真测试。测试表明:该控制器可以自主完成每条指令的运算,实现了逻辑运算指令的执行与系统其他功能模块的并行处理,提高了PLC执行指令序列的速度。

A logic operation controller for multioperand with FPGA is designed.The controller can independently complete the logic operation of PLC under the influence on internal timing pulse when it receives the command and multioperand,then it transfers the result to the system data bus.Operation instruction of PLC for multioperand logic operation is designed,the circuit composition and basic principle of the controller are discussed,the process of instruction execution under the internal timing pulse is analyzed and the flow diagram is drawn,Verilog HDL is used to achieve the related hardware construction and connection.A ladder diagram program is chosen for simulation test.The test shows that the controller can independently complete the function of each PLC logic operation instruction and can run with other function modules in parallel work,and enhance the logic operation instruction speed of PLC.