链式DSTATCOM分相封装建模及实时数字仿真研究

Modeling and Simulation of Cascade DSTATCOM with Small Time-step Based on RTDS

为了克服RTDS处理器计算能力受到小步长网络节点限制的局限性,采用分相封装的思想搭建了星形结构级联H桥多电平DSTATCOM小步长网络模型。首先,分析了链式DSTATCOM工作原理;其次,建立了星形结构链式DSTATCOM的数学模型;最后,结合载波移相SPWM调制技术,仿真研究了链式DSTATCOM在不同工况下的运行结果,验证了链式DSTATCOM小步长网络模型的正确性。

The computing power of RTDS processors is subject to the number of the electrical nodes in small-time step network solution. To overcome this limitation, the power network of cascade DSTATCOM with star configuration is modeled in RTDS as the MMC models of each phase are packaged individually in small-time step environment. The basic principle of cascade DSTATCOM is analyzed firstly. And then, the mathematical model of cascade DSTATCOM with star configuration is deduced. Finally, simulations are performed under different operating conditions based on CPS-SPWM for verification.