摘要
文中主要对DC-DC降压芯片电路进行研究,重点设计了使能保护电路模块。该电路模块设计了1.5 V和2.5 V两个比较电压点。当UEN小于1.5 V,整个芯片关断。当UEN超过1.5 V但小于2.5 V时,电源供电正常。当使能UEN大于2.5 V后,整个芯片正常工作。电路采用CMSC1μm5 V/40 V HVCMOS工艺中的5 V低压器件来构建,并在Cadence软件下进行了仿真验证。
This paper mainly researched the DC-DC buck chip circuit and designed the protection circuit module.Two voltage thresholds are set for the enable voltage(VEN)in the module.When the VEN is less than1.5 V,the whole chip is off.When VEN is between1.5 V and 2.5 V,the power supply is enabled.When VEN is larger than2.5 V,the whole chip operates normally.The error amplifier and overvoltage protection circuit are constructed with5 V low voltage devices of CMSC1μm5 V/40 V HVCMOS,and are simulated in the Cadence software.
出处
《通信电源技术》
2014年第6期48-50,共3页
Telecom Power Technology