摘要
介绍了使用Multi-Sites工程测试技术提高MCU芯片测试效率的方案。针对MCU芯片Multi-Sites测试难点,阐述了在MCU芯片Multi-Sites测试中电性能测试、功能测试的影响因素和解决方案,并对MCU芯片Multi-Sites测试过程中经常遇到的干扰因素进行分析,保证MCU芯片Multi-Sites测试获得稳定可靠的性能参数,有效提高测试效率。
Describes the use of multi-sites engineering testing technology to improve test MCU chip testing efficiency programs. For MCU chip multi-sites testing difficulties, elaborated factors and solutions for electrical performance testing, functional testing of the MCU chip multi-sites testing. And analyzing the interference factor MCU chip multi-sites testing process often encountered MCU chip to ensure stable and reliable test performance parameters, improve test efifciency.
出处
《电子与封装》
2014年第11期13-15,共3页
Electronics & Packaging
