摘要
文章提出了一种基于JTAG的SoC片上调试系统设计方法,该系统主要包括JTAG接口和片上调试模式控制单元。通过执行不同的操作指令,该片上调试系统可实现断点设置、单步执行、寄存器和存储器内容监控、在线编程以及程序运行现场设置等调试功能。文章同时说明了片上调试系统的工作原理和硬件架构。
The paper presents the design of On-chip debug system based on JTAG for So C, the system mainly includes JTAG interface and On-chip debug mode control unit. By executing different debugging instructions, On-chip debug system can perform debug functions, for example, setting breakpoints, single step execution, monitoring the registers and memory,programming on line and configuring microcontroller＇s execution state. Meanwhile, this paper expatiates working principle and hardware structure of the On-chip debug system.
出处
《电子设计工程》
2015年第3期154-156,共3页
Electronic Design Engineering
