36 mW 2抽头40 Gb/s四级脉冲幅度调制发送器的设计

Design of a 36mW 2-tap 40Gb/s PAM4 transmitter

基于SMIC 65-nm CMOS工艺设计了一种40Gb/s低功耗四级脉冲幅度调制(PAM4)发送器。设计中的预加重抽头只在输出信号电平转换后紧跟的单位时间间隔内才向输出节点注入电流。当输出信号不进行电平转换时,电流不流经预加重抽头,解决了现有预加重结构浪费功耗的问题。预加重抽头采用了一种新型的基于可开关电流源的低电压差分信号(LVDS)驱动单元,使得电路可以在高速下消除功耗浪费。电路采用了PAM4调制,降低了带宽的要求。仿真中使用的信道在20GHz的损耗为20.2dB。结果表明,经过预加重,接收端的信号的眼图高度120mV,眼图宽度为30ps。40Gb/s发送器电路的功耗为36mW,能效为0.9pJ/b。

A 40Gb/s four-level pulse amplitude modulation(PAM4)transmitter with 2-tap driver was designed based on SMIC65-nm CMOS technology.The proposed pre-emphasis only injects current into the output nodes during the one UI immediately after the voltage level transition of output signal.There is no current flowing through the pre-emphasis tap when there is voltage level transition.Thus,the power wasting problem existing in current implementations could be solved.The pre-emphasis tap employs a novel low-voltage differential signaling(LVDS)architecture with switchable current sources,eliminating the above-mentioned power wasting in the context of high-speed data transmission.PAM4 modulation is used to lower the requirements of bandwidth.The channel used in simulation has a 20.2dB loss at 20 GHz.Simulation results show that transmitted data in the receiver end achieve an eye height of 120 mV and an eye width of 30 ps.The 40 Gb/s transmitter consumes 36 mW,which is equivalent to 0.9pJ/b.