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一种低压高速灵敏放大器电路的设计 被引量:2

Design of a Low Voltage High Speed Sense Amplifier Circuit
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摘要 提出了一种适合于低电源电压嵌入式闪存系统的高速高抗干扰能力的灵敏放大器。讨论了应用在这个灵敏放大器中的多相位预充、自调节负载及新型的箝位技术。提出的灵敏放大器电路在0.18μm的嵌入式闪存平台上实现。测试结果表明:提出的灵敏放大器达到9ns的访问时间。 In this paper,a new high speed and high noise immunity sense amplifier circuit is proposed.Novel techniques of pre-charging,self-regulation and clamping are adopted to improve access speed and noise immunity under low power supply.The circuit is implemented in 0.18μm CMOS compatible embedded flash technology.Testing results show that the proposed sense amplifier could reach 9ns access time.
作者 张华
机构地区 武警工程大学
出处 《固体电子学研究与进展》 CAS CSCD 北大核心 2015年第1期94-99,共6页 Research & Progress of SSE
关键词 灵敏放大器电路 嵌入式闪存 低电源电压 sense amplifier circuit embedded flash low power supply
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  • 1Tanzawa T, Tana Techniques [J]. IEEE (1) : 84-89. ka Y, Takeuchi K, et al. Circuit 1. 8V--Only NAND Flash Memory of Solid Stale Circuits, 2002, 37.
  • 2Liu Jiang, Wang Xueqiang, Wang Qin. A low voltage sense amplifier for high-performance embedded flash memory [J]. Chinese Journal of Semiconductors, 2010, 31(10): 105001 57.
  • 3Guo Jiarong, Ran Feng. A new low-voltage and high- speed sense amplifier for flash memory[J]. Chinese Journal of Semiconductors, 2011, 32( 12): 125003-5.
  • 4Conte A, Lo Giudice G, Palumbo G, et al. A 1.35 V sense amplifier for non volatile memories based on cur- rent mode approach[C]. Solid state Circuits Confer- ence, 2004, Proceeding of the 30th European, 471- 474.
  • 5Micheloni R, Crippa L, Sangalli M, et al. The flash memory read path: building blocks and critical aspects [C]. Proceedings of the IEEE2003: 537-553.
  • 6Kataoka T. A 1.4 V 60 MHz access, 0.25 um embed- ded flash EEPROM[C]. Custom Integrated Circuits, 1999: 243-246.
  • 7Blalock T N, Jaeger R C. A high-speed clamped bit line current mode sense amplifier[C]. IEEE J Solid- state circuits, 1991: 542-548.

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