一种精确帧同步算法及FPGA实现

Implementation of a precise frame synchronization algorithm based on FPGA

帧同步算法通过检测帧头信息,使接收机从接收数据流中提取帧起始时刻和初始频偏,以引导解调环路恢复出有效数据。本文首先简要介绍了基于相关的经典帧同步算法原理,然后分析了信道环境对相关性能的影响,最后详细描述了一种经过改进的精确帧同步算法及其FPGA实现结果。该算法综合采用了分段本地相关、分段延迟相关和动态检测门限,有效解决了在大频偏和强噪声环境下的捕获虚(漏)警问题,并通过过采样和平滑提高了帧起始时刻与初始频偏的捕获精度,使解调环路锁定更快。测试表明,该算法复杂度适中,在低信噪比、高频偏环境下也具有优异性能,适合应用于卫星通信接收机。

By detecting frame header information, a frame synchronization algorithm is able to extract the start time of frame header and the initial frequency offset from received datas, these information＇will lead the demodulation loops to recover valid data. In this paper, We first introduced the principle of correlation-based classic frame synchronization algorithms briefly, then analysed the impact of channel environment on the performance of correlation, finally described an improved precise frame synchronization algorithm in detail, as well as its implementation based on FPGA. By using segmental local/delay correlation and dynamic detection threshold, the algorithm solves the problem of false-alarm and false-dismissal in the circumstance of strong noise and large frequency offset, and also improves the capture accuracy of frame header start time and calculated initial frequency offset through over sampling and smoothness, which makes demodulation loops lock faster. Tests show that, the algorithm is characterized with moderate complexity and favourable performance, even in the low signal-to-noise ratio and high frequency offset conditions, it is applicable to the satellite communication receiver.