基于verilog的序列检测器设计

Serial Detector Design Based on Verilog

随着科技的飞速发展,传统的电子技术逐渐被现代电子技术取代,以FPGA/CPLD为硬件,以verilog语言为软件的EDA技术应用越来越广泛,本文旨在以一个具体的序列检测器的设计为例,将以硬件描述语言来设计芯片的流程呈现给大家。

With the development of science and technology, traditional electronic technology is gradually replaced of the modem electronic technology, as the hardware with FPGA/CPLD,using Verilog language as the EDA technique is applied more and more widely in software,aimed to design a specific serial detector as an example,show the process of using hardware description language to design the chip for you.