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动态可重构系统的CAN总线通信系统设计

Design of CAN Bus Communication Controller in Dynamic Configurable System
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摘要 针对动态可重构系统中的通信系统具有灵活性和可扩展性的特点,设计并实现了可重构系统中的CAN总线通信系统。CAN总线通信系统以SJA1000为总线控制器、PCA82C250为总线收发器,设计了硬件接口电路,采用Verilog HDL进行了软件设计。论文阐述了CAN总线软件设计的过程,并对软件程序在Modelsim中进行了仿真测试,仿真结果验证了CAN总线通信系统设计的正确性和合理性。 For the communication system has the characteristics of flexibility and extensibility in dynamic reconfiguration system,this paper designs and realizes the CAN bus communication system.The hardware interface circuit is made up with SJA1000 and PCA82C250,and the software program is designed with Verilog HDL.And then the process of software program is analyzed in this paper,meanwhile the programs are tested in Modelsim.The test results verify the correctness and rationality of the CAN bus communication system.
出处 《工业控制计算机》 2015年第2期15-16,20,共3页 Industrial Control Computer
基金 国家自然科学基金项目(61203009)资助
关键词 动态可重构 CAN总线 SJA1000 VERILOG dynamic reconfiguration CAN-bus SJA1000 Verilog
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参考文献4

  • 1彭晓明,庞建民,郭浩然.动态可重构技术研究综述[J].计算机工程与设计,2012,33(12):4514-4519. 被引量:11
  • 2STEIGER C ,WALDER H ,PLATZNER M. Operating systems for reconfigurable embedded platforms : online scheduling of real-time tasks [J] . IEEE Trans on Computers .2004.
  • 3AI Qizhong,GUO Yifeng,CHEN Wenhei,et aI.A Programmable Controller Based on CAN Field BusEmbedded Microproces- sor and FPGA [C] //Seventh International Symposium on In- strumentation and Control Technology. 2009.
  • 4范斌,常青.基于DSP的FPGA动态重构系统研究与设计[J].信息与电子工程,2010,8(2):123-127. 被引量:8

二级参考文献40

  • 1覃祥菊,朱明程,张太镒,魏忠义.FPGA动态可重构技术原理及实现方法分析[J].电子器件,2004,27(2):277-282. 被引量:44
  • 2陈松柏,周进.基于DSP+FPGA的多目标实时检测系统设计[J].信息与电子工程,2007,5(1):22-25. 被引量:5
  • 3Awad M FPGA supercomputing platforms: A survey [C]. In-ternational Conference on Field Programmable Logic and Appli-cations. 2009s 564-568.
  • 4Cardoso J M P, Diniz P C,Weinhardt M. Compiling for recon-figurable computing: A survey [J]. ACM Computing Surveys(CSUR), 2010,42 (4); 13-27.
  • 5Mohammad K,Agaian S. Efficient FPGA implementation ofconvolution [C]. IEEE International Conference on Systems,Man and Cybernetics, San Antonio? 2009: 3478-3483.
  • 6Todman T F, Constantinides G A, Wilton S,et al. Reconfigu-rable computing: architectures and design methods [J]. IEE Pro-ceedings-Computers and Digital Techniques, 2005,152 ( 2):193-207.
  • 7BEEcube Inc. BEE4 hardware platform user manual [EB/OL].[2011-12-07]. http://www. beecube. com.
  • 8SGI Inc. RASC RC100 blade [EB/OL]. [2010-03-29]. http://www. sgi. com.
  • 9GUO Z, Buyukkurt B, Cortes J. A compiler intermediate repre-sentation for reconfigurable fabrics [J]. International Journal ofParallel Programming, 2008, 36 (5) : 493-520.
  • 10Vahid F, Stitt G. Hardware/software partitioning [J]. Recon-figurable Computing, 2008: 539-560.

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