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55V沟槽型功率场效应管设计

The Design of 55V Power UMOSFET
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摘要 设计了一款55V N沟道沟槽型功率器件。通过对元胞与边端进行理论分析,结合实际工艺,对元胞与边端进行合理优化。通过对流片测试数据的分析,最终实现击穿电压为69.562V、阈值电压2.85V、特征导通电阻537.8 mΩ·cm2的功率器件设计。仿真与流片的击穿电压偏差1.5%、阈值电压偏差2.4%、导通电阻偏差0.83%,器件具有较高的可靠性。 A 55 V Power UMOSFET has been designed. On the basis of theory of cell and termination structure,the parameters of the cell and termination have been optimized by the simulation with actual process. By analyzing the tape-out test data,the design of POWER MOSFET with 69. 562 V breakdown voltage,2. 85 V threshold voltage and537. 8 mΩ·cm2specific on-resistance is achieved. Between the simulation result and tape-out,the deviation of breakdown voltage,threshold voltage and on-resistance is 1. 5%,2. 4% and 0. 83 respectively. The device has high reliability.
出处 《电子器件》 CAS 北大核心 2015年第1期23-26,共4页 Chinese Journal of Electron Devices
基金 国家自然科学基金项目(61271090) 国家863计划重大项目(2012AA012305)
关键词 沟槽功率器件 元胞 终端 流片测试 power UMOSFET cell structure termination structure tape-out
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  • 1Kuntjoro Pinardi, Ulrich Heinle, Jorgen Olsson, Stefan Bengtsson and Jean-Pierre Colinge.Unclamped Inductive Switching Behaviour of High-Power SOI VerticalDMOS Transistors withLateral Drain Contacts[J]. Solid-State Electronics,2002,46:2105-2110.
  • 2Yilmaz H,Tsui T, Bencuya I, Fortier Y, and Owyang K. Safe Operating Area of Power DMOS FETs [J] . IEEE, 1989 ,173-175.
  • 3zhy Ronghua and Chow T Paul . A Comparative Study of the Quasi-saturation in the High Voltage Vertical DMOS for Different cell Geometries [c] . In: Proceedings of 1998 international Symposium on Power Semiconductor Device & Ics ,Kyoto :343-346.
  • 4Kuntjoro Pinardi, Ulrich Heinle, High-Power SOI Vertical DMOS Transistors With Lateral Drain Contacts: Process Developments,Characterization, and Modeling [J] . IEEE Transactions on Electron Derices, MAY 2004,51 (5).

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