基于FPGA和DSP的数据采集与压缩系统

Data Acquisition and Compression System Based on FPGA and DSP

应用于箭体各模块功能测试,对数据采集有特殊的技术指标,要求系统能读取大容量数据、误码率极低。基于此参考已有的压缩技术,设计了基于FPGA和DSP的数据采集与压缩系统,能够实现12路模拟信号的采集与处理,采样率为324ksample/s。采用DSP对数据进行压缩,压缩去除率达到75%。针对采集数据误码问题,提出对数据分帧传输的设计方案。最后对系统进行了测试验证,实验表明系统性工作稳定、各项技术指标均达到要求。

The test of each module function which is applied to the body of the arrow,has a special technical index for the data acquisition,for examples,the requirement of reading the data of large capacity,the error rate is extremely low. By referring to the existing data collection and compression technology designs the data acquisition and compression system which bases on FPGA and DSP. This system can realize the acquisition and processing of 12 analog signals,the sample rate is 324 ksample / s. To compress the data through using DSP chip,the compression removal rate can reach 75%. According to the data error problems,this system comes up with the design of data stream frame transmission. Finally,the tests have been carried out,the experiments show that systematic work is stable,the system solves the problem of the unity of the performance,power consumption and speed.