期刊文献+

Compact analytical model of double gate junction-less field effect transistor comprising quantum-mechanical effect 被引量:1

Compact analytical model of double gate junction-less field effect transistor comprising quantum-mechanical effect
原文传递
导出
摘要 We investigate the quantum-mechanical effects on the electrical properties of the double-gate j unction- less field effect transistors. The quantum-mechanical effect, or carrier energy-quantization effects on the threshold voltage, of DG-JLFET are analytically modeled and incorporated in the Duarte et al. model and then verified by TCAD simulation. We investigate the quantum-mechanical effects on the electrical properties of the double-gate j unction- less field effect transistors. The quantum-mechanical effect, or carrier energy-quantization effects on the threshold voltage, of DG-JLFET are analytically modeled and incorporated in the Duarte et al. model and then verified by TCAD simulation.
出处 《Journal of Semiconductors》 EI CAS CSCD 2015年第2期42-47,共6页 半导体学报(英文版)
关键词 quantum-mechanical effect junction-less transistor threshold voltage oxide thickness quantum-mechanical effect junction-less transistor threshold voltage oxide thickness
  • 相关文献

参考文献1

二级参考文献30

  • 1Kanungo S, Rahaman H, Gupta P S. A detail simulation study on extended source ultra-thin body double-gated tunnel FET. IEEE 5th International Conference on Computers and Devices for Communication (CODEC), 2012.
  • 2Wang P Y, Tusi B Y. Sit-xGex epitaxial tunnel layer structure for P-channel tunnel FET improvement. IEEE Trans Electron De- vices, 2013, 60(12): 4098.
  • 3Ganapathi K, Yoon Y, Salahuddin S. Analysis of InAs vertical and lateral band-to-band tunneling transistors: leveraging verti- cal tunneling for improved performance. Appl Phys Lett, 2010, 97(3): 033504.
  • 4Ionescu A M, Riel H. Tunnel field-effect transistors as energyefficient electronic switches. Nature, 2011, 479: 329.
  • 5Mishra R, Ghosh B, Banarjee S K. Device and circuit performance evaluation and improvement of SiGe tunnel FETs. IEEE International Conference on Enabling Science and Nanotechnology (ESciNano), 2011.
  • 6Mamilla B K, Naiyar S, Mishra R, et at. A III-V group tunnel FETs with good switching characteristics and their circuit performance. International Journal of Electronics Communication and Computer Technology, 2011, 1(2): 26.
  • 7Ghosh B, Akram M W. Junctionless tunnel field effect transistor. IEEE Electron Device Lett, 2013, 34(5): 584.
  • 8Bal P, Akram M W, Mondal P, et al. Performance estimation of sub-30 nm junctionIess tunnel FET (JLTFET). J Comput Electron, 2013,12: 782.
  • 9Asthana P K, Ghosh B, Goswami Y, et al. High speed and low power ultra-deep-submicron III-V hetero-junctionless tunnel field effect transistor. IEEE Trans Electron Devices, 2014, 61(2): 479.
  • 10Colinge J P, Lee C W, Afzalian A, et al. Nanowire transistors without junctions. Nature Nanotechnol, 2010, 5(3): 225.

共引文献1

同被引文献1

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部