期刊文献+

新型高增益CMOS跨导运算放大器 被引量:7

Novel High Gain CMOS Operational Transconductance Amplifier
下载PDF
导出
摘要 为了解决在低电压、深亚微米工艺条件下获得高增益运算放大器的问题,通过引入电流倍增和分流技术,提出了一种新型高增益可调的跨导运算放大器(OTA)。在1.8V工作电源下采用0.18μm COMS标准工艺对其进行Spectre模拟,结果表明,该OTA的直流开环增益在61dB至91dB可调,最大静态功耗为434μW,最小共模抑制比为114dB。所提出的跨导运放与传统OTA相比,具有高增益和增益可调的优点,可适用于通信、电子测量,以及自动控制等系统。 A novel operational transconductance amplifier(OTA)with high and variable gain,by introducing the current multiplication and distribution technology,is proposed to solve the problem of obtaining high and tunable gain operational amplifier in a low voltage and deep sub-micron process.Under the supply voltage of 1.8V,the OTA is simulated by Spectre in 0.18μm standard COMS technology.Results show that the OTA gets a DC open loop tunable gain from 61dB to 91dB,maximum static power consumption of 434μW and minimum common mode rejection ratio of 114dB.Compared with traditional OTA,the proposed OTA has the advantages of high and variable gain,it can be applied to communication,electronic measurement and automatic control systems.
出处 《广西师范大学学报(自然科学版)》 CAS 北大核心 2014年第4期6-10,共5页 Journal of Guangxi Normal University:Natural Science Edition
基金 国家自然科学基金资助项目(61361011)
关键词 CMOS 跨导运放 电流处理 高增益 CMOS OTA current processing high gain
  • 相关文献

参考文献11

  • 1BULT K, GEELEN G J G M. A fast-settling CMOS op amp for SC circuits with 90-dB DC gain[-J~. IEEE Journal of Solid-State Circuits, 1990, 25(6) : 1379-1384.
  • 2URBAN C, MOON J E, MUKUND P R. Designing bulk-driven MOSFETs for ultra-low-voltage analogue applications[-J~. Semiconductor Science and Technology, 2010, 25 (11) : 1-8.
  • 3RAGHAV H S, SINGH B P, MAHESHWARI S. Design of low voltage OTA for bio-medical application[-C~// Emerging Research Areas and 2013 International Conference on Microelectronics. New York:IEEE Press, 2013: 1-5.
  • 4张津京,裴东.一种0.18μm CMOS低电压低功耗跨导运算放大器[J].微电子学,2012,42(3):315-317. 被引量:4
  • 5SONI M B H, DHAVSE M R N. Design of operational transconduetance amplifier using 0.35 /~m TechnologyEJ~. International Journal of Wisdom Based Computing, 2011,1 (2) : 28-31.
  • 6LI Yi-lei, HAN Ke-feng, TAN Xi, et al. Transconductance enhancement method for operational transconductance amplifiers[J]. Electronics Letters, 2010,46 (19) ~ 1321-1323.
  • 7YAN Z, MAK P I, MARTINS R P. Double recycling technique for folded-cascode OTAEJ]. Analog Integrated Circuits and Signal Processing, 2012, 71(1): 137-141.
  • 8解鸿国,宋树祥.新型高频高线性CMOS跨导线性电流模乘/除法器设计[J].广西师范大学学报(自然科学版),2012,30(2):12-16. 被引量:2
  • 9ZHU Jing, ZHANG Yun-wu, SUN Wei-feng, et al. A novel operational transconductance amplifier with high Gm using improved differential current redistribution technique (DCRT)[C]//ASIC (ASICON), 2013 IEEE 10th International Conference. New York:IEEE Press, 2013: 1-4.
  • 10KANG S Y, JANG J, OH I Y, et al. A 2.16 mW low power digitally-controlled variable gain amplifier[-J~. Microwave and Wireless Components Letters, IEEE, 2010,20(3): 172-174.

二级参考文献12

  • 1严晓浪,吴晓波.低压低功耗模拟集成电路的发展[J].微电子学,2004,34(4):371-376. 被引量:10
  • 2易清明,张静,石敏.低功耗CMOS集成运算放大器的研究与设计[J].微电子学,2007,37(3):414-416. 被引量:18
  • 3DEVADAS S, MALIK S. A survey of optimization techniques targeting low power VLSI circuits [C] // IEEE Proc 32nd ACM/IEEE Conf Des Autom. New York, USA. 1995: 242-247.
  • 4CLEIND.CMOS集成电路版图概念、方法与工具[M].邓红辉,王晓蕾,耿罗锋,等译.北京:电子工业出版社,2006:20-62,139-164.
  • 5LOPEZ-MARTIN A J,CARLOSENA A. Design of MOS-translinear multiplier/dividers in analog VLSI[J]. VLSI Design Journal, 2000,11 (4): 321-329.
  • 6LOPEZ-MARTIN A J,CARLOSENA A. A versatile 1. 5 V current-mode CMOS analog multiplier/divider circuit [C]//Circuit Paradigm in the 21th Century:Proceedings of the 15th European conference on circuit theory and de- sign. Espoo : Helsinki University of Technology, 2001 : 89-92.
  • 7LOPEZ-MARTIN A J,CARLOSENA A. Systematic design of companding systems by component substitution[J]. Analog Integrated Circuits and Signal Processing, 2001,28 (1) : 91-106.
  • 8De La CRUZ-BLAS C A,LOPEZ-MARTIN A J,CARLOSENA A. 1.5 V four-quadrant CMOS current multiplier/di- vider [J]. Electronics Letters, 2003,39 (5) : 434-436.
  • 9TANNO K,ISHIZUKA O,TANG Zheng. Four-quadrant CMOS current-mode multiplier independent of device pa- rameters[J]. IEEE Trans Circuits Syst ~ :Analog and Digital Signal Processing, 2000,47 (5) : 473-477.
  • 10GRAVATI M,VALLE M,FERRI G,et al. A novel current-mode very low-power analog CMOS four quadrantmul- tiplier[C]//Proc the 31st European Solid-state Circuits Conference. New York.-IEEE Press, 2005 : 495-498.

共引文献3

同被引文献58

  • 1毛伟,张波.一种新型的指数曲率补偿带隙基准源[J].微电子学,2006,36(4):495-497. 被引量:11
  • 2张娜,姚素英,徐江涛.用于CMOS图像传感器的列并行高精度ADC[J].固体电子学研究与进展,2006,26(3):349-353. 被引量:4
  • 3陈卫洁,邹雪城,程帅,邓敏.一种超宽共模输入范围高性能运算放大器的设计[J].微电子学与计算机,2007,24(1):79-81. 被引量:5
  • 4徐静萍.一款低电压高精度CMOS运算放大器设计[J].西安邮电学院学报,2008,13(1):72-74. 被引量:3
  • 5MAGNELLI L,CRUPI F,CORSONELLO P,et al. A 2.6 nW, 0.45 V temperature-compensated subthreshold CMOSvoltage referenced[J].IEEE Journal of Solid-State Circuits,2011,46(2) . 465-474.
  • 6LEE S,LEE H?WOO J K.Low-voltage bandgap reference with output-regulated current mirror in 90 nm CMOS[J].Electronics Letters,2010,46(14) : 976-977.
  • 7LAM Y H, KI W H. CMOS bandgap references with self-biased symmetrically matched current-voltage mirror andextension of sub-l-V design[J]. IEEE Transactions on, Very Large Scale Integration Systems,2010,18(6) : 857-865.
  • 8IVANOV V,BREDERLOW R,GERBER J. An ultra low power bandgap operational at supply from 0.75 V[J]. IEEEJournal of Solid-State Circuits, 2012,47(7) : 1515-1523.
  • 9HE J ,CHEN D, GEIGER R. Systematic characterization of subthreshold-MOSFETs-based voltage references for ultralow power low voltage applications [C]// 53rd IEEE International Midwest Symposium on Circuits and Systems.IEEE, 2010: 280-283.
  • 10LEUNG K N,MOK P K T,LEUNG C Y. A 2-V 23-pA 5.3-ppm/C curvature-compensated CMOS bandgap voltagereference[J]. IEEE Journal of Solid-State Circuits,2003,38(3) : 561-564.

引证文献7

二级引证文献11

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部