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基于投机执行的两级退休机制

Two-level retirement mechanism based on speculative execution
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摘要 针对超标量处理器中指令长时间占用重排序缓存引起指令退休缓慢的问题,提出了一种基于投机执行的两级退休机制。该方案根据指令有无异常和预测错误风险将指令分为有风险指令和无风险指令,对重排序缓存进行轻量化改进,只有存在异常和预测风险的指令才允许进重排序缓存,在确认风险消除后将指令快速退休。重命名寄存器从重排序缓存分离,负责寄存器重命名和结果乱序回写。实验结果表明,在硬件资源相同的情况下,基于该方案的处理器比传统的按序退休处理器的性能平均提高28.8%以上。 In high-performance superscalar microprocessors,instructions stay in reorder buffer too long. As a result,instructions in the pipeline retire slowly. This paper proposed a two-level retirement architecture based on speculative execution,in which instructions classified according to instruction's risk with exception and mis-prediction. Only the risky instructions could be created into reorder buffer,then retired after confirming the elimination of risk. It separated a result buffer from the reorder buffer to achieve register renaming and out-of-order writing back. The experiment shows that in the condition of the same resource,the performance can be improved by 28. 8% at least,compared to the traditional architecture.
出处 《计算机应用研究》 CSCD 北大核心 2015年第4期1032-1035,共4页 Application Research of Computers
基金 国家科技重大专项核高基重大专项资助项目(2009ZX01030-001-002)
关键词 投机执行 重排序缓存 快速退休 乱序回写 超标量 speculative execution reorder buffer(ROB) fast retire out-of-order write back superscalar
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