摘要
提出了一种基于TIA/EIA-899标准的TYPE-I型M-LVDS接收芯片的实现方案,设计了一种新颖的共模搬移电路在实现超越电源电压轨的共模输入范围的同时简化了后级电路设计,节约了面积和功耗,电路中预放大器将输入信号放大一定倍数,迟滞比较器为系统引入迟滞效果。芯片采用GSMC0.18μm 1P6M CMOS工艺流片验证。测试结果表明,该芯片共模输入范围为-1.4V^3.8V,信号传输速率大于250 Mbps,具有典型值为28mV的迟滞效果。
We propose an implementation scheme for a TYPE-I M-LVDS receiver based on TIA/EIA-899 standard.A novel common-mode voltage shift circuit is designed to realize an input common-mode range that is beyond the rail of the power voltage,which can simplify the post stage circuit,thus saving area and power consumption.The pre-amplifier in the receiver can provide a fixed magnification for input signals,and the hysteresis comparator brings hysteresis effect to the system.The chip is fabricated in GSMC 0.18μm 1P6 M CMOS technology,and the test results indicate that the receiver has an input common-mod range of-1.4V～3.8V,a signaling rate greater than 250 Mbps,and a typical hysteresis voltage is 28 mV.
出处
《计算机工程与科学》
CSCD
北大核心
2015年第3期452-456,共5页
Computer Engineering & Science
基金
湖南省工业支撑项目(2013GK3019)
关键词
M-LVDS
高速接口
共模电压
迟滞
M-LVDS
high-speed interface
common-mode voltage
hysteresis
