Index-Based Cache Coherence Protocol
Index-Based Cache Coherence Protocol
出处
《通讯和计算机（中英文版）》
2014年第6期479-483,共5页
Journal of Communication and Computer
参考文献11
-
1Culler, D. E., Singh, J. P., and Gupta, A. 1999. Parallel Computer Architecture." A Hardware~Software Approach. Morgan Kaufmann.
-
2Hwang, K. 1993. Advanced Computer Architecture. Parallelism, Scalability, Programmability. McGraw Hill.
-
3Agarwal, A., and Simoni, R. 1988. "An Evaluation of Directory Schemes for Cache Coherence." In Proceedings of the 15th Annual International Symposium on Computer Architecture, 280-89.
-
4Alvarez, L. 2012. "Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories." In Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis.
-
5Ahmed, R. E., and Dhodhi, M. K. 2011. "Directory-Based Cache Coherence Protocol for Power-Aware Chip-Multiprocessors." In Proceedings of the 24th Canadian Conference on Electrical andComputer Engineering, 1036-39.
-
6Yi, K., and Gaudiot, J. L. 2007. "Architectural Implications of Cache Coherence Protocols with Network Applications on Chip Multiprocessors." In Network and Parallel Computing 4672: 394-403.
-
7Rodrigues, R., and Koren, 1. 2012. "A Mechanism to Verify Cache Coherence Transactions in Multicore Systems." In Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLS1 and Nanotechnology Systems (DFT), Austin, 211 - 16.
-
8Li. J. M., and Yang, P. F. 2011. "A New Kind of Hybrid Cache Coherence Protocol for Multiprocessors with D-Cache." Presented at the International Conference on Future Computer Science and Education (ICFCSE), Xi'an.
-
9Chen, X., and Yang, Y. 2010. "Efficient Methods for Formally Verifying Safety Properties of Hierarchical Cache Coherence Protocols." Formal Methods in System Design 36: 37-64.
-
10Hashemi, B. 2011. "Simulation and Evaluation of Snoopy Cache Coherence Protocols with Update Strategy in Shared Memory Multiprocessor Systems." Presented at the 9th IEEE International Symposium on Parallel and Distributed Processing with Applications Workshops (ISPAW).
-
1潘宏,林惠民,吕毅.Model Checking Data Consistency for Cache Coherence Protocols[J].Journal of Computer Science & Technology,2006,21(5):765-775. 被引量：1
-
2胡伟武,water.chpc.ict.ac.cn,施巍松,water.chpc.ict.ac.cn,唐志敏,water.chpc.ict.ac.cn,李明,water.chpc.ict.ac.cn.A Lock-Based Cache Coherence Protocol for Scope Consistency[J].Journal of Computer Science & Technology,1998,13(2):97-109.
-
3胡伟武,water.chpc.ict.ac.cn,施巍松,water.chpc.ict.ac.cn,唐志敏,water.chpc.ict.ac.cn.A Framework of Memory Consistency Models[J].Journal of Computer Science & Technology,1998,13(2):110-124. 被引量：1
-
4郑志硕,郑存陆,曹宏徙.基于Simics的分布式一致性协议仿真[J].计算机与现代化,2011(9):105-108.
-
5WANG Hui,WANG Rui,LUAN ZhongZhi,QIAN XueHai,QIAN DePei.Improving multiprocessor performance with fine-grain coherence bypass[J].Science China(Information Sciences),2015,58(1):81-95. 被引量：1
