摘要
为了保证测速和测距精度,有效手段之一是在星载统一测控应答机上采用嵌套环路结构的载波跟踪环完成相干载波提取。由于利用了相干本振补偿多普勒频移,必须考虑输入相位噪声对本振相位噪声的影响。为了准确预测环路输出相位噪声性能,对环路中各部件贡献的相位噪声进行了分析。针对不同噪声源,运用信号流图的分析方法建立了对应的环路相位噪声模型,通过仿真计算得到了不同输入信号功率条件下的环路输出相位噪声功率谱,与实际电路的测试结果对比,证明了该环路相位噪声模型的准确性。应用该模型能提高环路设计的准确性和效率。
To guarantee speed and range measurement accuracy, one of the effective means is to apply the carrier tracking phase locked loop(PLL) with nested loop structure in the spaceborne uniform TT&C tran- sponders for acquiring coherent earrier. Because coherent local frequency is used to compensate Doppler shift, it is necessary to consider the effect of input phase noise on local oscillator phase noise. To predict loop output phase noise performance precisely, loop phase noise models of different noise components are built by means of analyzing signal flow graph and phase noise each component contributes. Output phase noise power spectrum density (PSD) with different input signal power is simulated and calculated. The ac- euraey of loop phase noise is verified by comparing the result of simulation with that of actual circuit. Using this model can improve loop design accuracy and efficieney.
出处
《电讯技术》
北大核心
2015年第4期435-440,共6页
Telecommunication Engineering