一种低功耗高频小数频率综合器

A Low-Power High-Frequency Fractional-N Frequency Synthesizer

采用SMIC 180nm CMOS工艺,设计了一款用于脉冲超宽带系统的锁相环型小数频率综合器。使用闪烁噪声抑制技术、感性峰化技术和动态反馈技术,分别对正交压控振荡器、预分频器以及电荷泵的性能进行了优化。测试结果表明,该频率综合器芯片能稳定工作在7.45GHz,功耗为27mW,带内和带外1MHz处相位噪声分别为-70dBc/Hz和-111.3dBc/Hz。

A phase-locked loop fractional-N frequency synthesizer used for IR-UWB system was designed in SMIC180 nm CMOS process.The quadrature voltage-controlled oscillator,prescaler and charge pump had been optimized with the flicker noise reduction technique,the inductive-peaking technique and the dynamic feed-back technique respectively.The test results showed that the proposed synthesizer consumed 27 mW at the operating frequency of7.45 GHz,an in-band phase noise of-70dBc/Hz and an out-band phase noise of-111.3dBc/Hz at 1MHz offset were achieved.