数字电路中NBTI效应仿真及建模方法的研究

Model Simulation and Verification of NBTI in Digital Circuits

负偏压温度不稳定性(NBTI)效应已成为影响数字电路设计的重要可靠性问题之一。首先讨论了PMOS晶体管中NBTI效应对数字电路的影响,提出针对不同工艺PMOS管中NBTI效应建模的流程,设计了一种基于SPICE模型的NBTI仿真模型。该模型能够通过Cadence软件调用,并在实际的数字电路设计中进行动态仿真,预测NBTI效应对电路性能的影响。基于该建模流程,在Cadence软件中对基于40nm工艺的一级两输入与非门和四十级反相器组成的环形振荡器进行仿真。仿真结果表明,该模型能够对不同工艺下PMOS管中的NBTI效应进行准确、有效地仿真,为数字电路的可靠性设计提供保障。

Negative bias temperature instability（NBTI）has become a major reliability concern in the digital circuit design.The effects of NBTI on digital circuit design were discussed,and the modeling process for different PMOS transistors under NBTI effect was proposed.A NBTI SPICE-based simulation module was designed,which could be used in Cadence for simulation in daily digital circuit design.Simultaneously,a CMOS ring oscillator consisting of a 2-input NAND and 40 stage inverters had been simulated under 40 nm technology.The results showed that the proposed model could conveniently and precisely simulate the effects that NBTI brought to digital circuit under different crafts.