摘要
该文在TiO2压敏陶瓷中掺杂CeO2,研究了烧结温度和CeO2掺杂量对TiO2基压敏陶瓷的电学性能的影响。结果表明,烧结温度为1 400℃、CeO2掺杂摩尔分数为1.0%时,TiO2基压敏陶瓷表现出较好的综合电学性能:压敏电压为7.7V/mm,非线性系数为3.8,漏电流为0.1A,且具有优的介电常数和介电损耗。
The effects of the sintering temperature and doping amount of TiO2 on the electrical performance of TiO2-based caristor ceramics have been investigated in this paper.The results show that the prepared TiO2-based varisor ceramics have good comprehensive electrical performance at sintering temperature of 1 400℃ and 1.0% mol of CeO2 doping,its varistor voltage is 7.7V/mm,nonlinear coefficient is 3.8,the leakage current is 0.1A,and also has excellent dielectric constant and dielectric loss.
出处
《压电与声光》
CSCD
北大核心
2015年第2期287-290,共4页
Piezoelectrics & Acoustooptics
基金
国家高技术研究发展计划("八六三"计划)基金资助项目(2013AA031803)
关键词
压敏陶瓷
烧结温度
CeO2掺杂
压敏性能
介电性能
varistor ceramic
sintering temperature
CeO2 doped
sensitive properties
dielectric properties
