摘要
通过对反正切函数实现算法的研究,在传统CORDIC算法的基础上,提出了一种以超前进位加法器为基本单元的迭代结构,双时钟输入,完成了反正切函数的ASIC电路设计。该算法采用TSMC55 nm工艺,在Synopsys/syn10.12环境中综合实现。该算法的关键路径由原来的2.9 ns提升至1.3 ns,最高运算频率可以达到769 MHz,即优化后的CORDIC算法比优化前速率提高了2倍多。
Through the study of algorithms implements of the arctangent function, proposed a hierarchical carry lookahead adder structure as the basic unit of iterations basing on traditional CORDIC algorithms, double clock input, completed the ASIC circuit design of the arctangent function. The algorithm applied TSMC 55 nm process and achieved a comprehensive in Synopsys/syn 10.12 environment. The key way of the algorithm was reduced from 2.9 ns to 1.3 ns, the highest operation frequency is able to reach 769 MHz, the speed of the whole system was twice more than the original design.
出处
《电子与封装》
2015年第3期22-25,共4页
Electronics & Packaging