摘要
本文介绍了针对高性能DSP的Rapid IO控制器IP应用及集成。该控制器IP支持Rapid IO标准协议版本2.2,包含完整的三层体系结构及应用层接口逻辑。控制器IP配置总线和数据总线采用标准的AMBA总线接口,向用户开放多个可配置的Master和Slave端口。
The application and integration method of RapidIO controller IP for high - performance DSP has been introduced in this paper. The controller IP introduced in this paper follows RapidlO standard protocol 2.2, which contains the entire three level architecture, application layer interfacing logics. The standard AMBA bus interfaces have been applied in the configuration and data exchange buses of this controller IP, which provides a batch of configurable Master and Slave ports.
出处
《中国集成电路》
2015年第1期35-38,共4页
China lntegrated Circuit
