摘要
文章提出了一种稳定的高阶 Σ- Δ模数转换器的设计方法。结合实例 ,简要说明了多级数字抽取滤波器的设计 ,并讨论了调制器基带内零点优化的方法。设计的 Σ- Δ A/D转换器可以满足无线通信应用中大动态范围
A method to design stable, high order delta sigma analog to digital converter is presented in the paper The design of a multi stage decimation filter is also illustrated Optimization of zero positions within baseband in the modulator is discussed The sigma delta A/D converter designed is applicable for applications in wireless communication where large dynamic range is demanded
出处
《微电子学》
CAS
CSCD
北大核心
2002年第2期93-96,共4页
Microelectronics