适用于高速闪存的超快无片外电容LDO

Ultra-Fast LDO Without Off-Chip Capacitor for High-Speed Flash Memory

提出了一种适用于闪存的瞬态增强的无片外电容低压差线性稳压器（LDO）。该LDO采用了具有超低输出阻抗的缓冲器驱动功率管和高能效基准方法,缓冲器采用并联反馈技术降低输出电阻以增强功率管栅端的摆率。高能效基准电路在静态模式输出小基准电流以减少静态功耗,而在工作模式提供大的基准电流以增加闭环带宽和功率管栅端的摆率。设计的LDO应用于采用70 nm闪存工艺制造的、工作电压为2~3.6 V和存储容量为64 M的闪存中。测试结果表明,该LDO输出的调制电压为1.8 V,最大输出电流为40 m A,在没有负载的条件下仅消耗8.5μA的静态电流,在满载电流变化时,用于闪存时仅有20 ns响应时间且最大输出电压变化仅为72 m V,满足高速闪存的要求。

A low-dropout regulator（ LDO） with transient response enhancement and without off-chip capacitor for flash memory application was proposed. The power transistor driven by a buffer with the ultralow output impedance and the high energy efficiency bias method were used. The technique of shunt feedback technology was used with the buffer to reduce output impedance for enhancing slew rate at the gate of power transistor. The high energy efficiency bias circuit provides small bias current in standby condition for reducing power consumption and large bias current in operating mode for enhancing slew rate at the gate of p MOS transistor and bandwidth of closed loop. The LDO was implemented on a 2- 3. 6 V 64 M flash memory fabricated with a 70 nm flash process. The test results show that the output regulated voltage is 1. 8 V and a maximum output current of the LDO is 40 m A,and the quiescent current is only 8. 5 μA under zero-load condition.During the transient response of full current change,the maximum output voltage variation of the LDO is only 72 m V while the response time is 20 ns for the high-speed flash memory.