UHF RFID芯片数字电路的低功耗设计

Low Power Design of UHF RFID CHIP Digital Circuit

UHF RFID的一个重要性能指标就是工作距离,而提高工作距离的有效方法就是降低标签工作功耗。本文阐述了一款基于ISO 18000-6C协议的UHF RFID数字电路的设计,详细描述了各种低功耗设计技术,如确定最低系统时钟频率、运算器的输入端采用寄存器、减少移位寄存器、比较采用串行方式、逻辑单元复用、增加门控等。经流片结果证明,这些方法非常有效地降低了标签芯片功耗,在工作电压为1 V,时钟为1.92 MHz条件下,标签数字电路功耗为4.56μW。

One of the most important performance specifications of UHF RFID is the operating distance, which can be extended by reducing the power consumption of tag. In this paper, a design of UHF RFID digital circuit based on ISO 18000-6C protocol, described in detail a variety of low power design techniques, such as determining the minimum frequency of system clock, the input of calculators using registers, reduce the shift registers, serial compare working mode, reuse of the logic units, clock-gating, etc. The results of the chip show that the method is very effective to re- duce the power consumption, tag digital circuit power is 4.56 uW under 1.92 MHz clock frequency with 1V power supply.