摘要
在通信设施、成像设备、工业仪器仪表等需要大量数据的系统中,要求数据转换级提供越来越宽的分辨率和越来越高的采样率。并行接口的物理布局和串行LVDS方法的比特率限制,给设计人员带来技术障碍。文中基于Xilinx Vertx6 FPGA的GTX高速串行接口实现了JESD204B协议,有效地解决了传统采集数据并行传输时的各种问题。
In systems where communication infrastructure, imaging equipment, and industrial instrumentation need large data, it is needed that the data conversion stage provides increasingly wide resolution and high sampling rate. The parallel interface＇s physical layout and the serial LVDS method＇s bit rat bring technical barriers to designers. In this paper, the JESD204B protocol is realized based on Xilinx Vertx6 FPGA＇s GTX, which helps solve the problems in traditional data acquisition parallel transmission.
出处
《电子科技》
2015年第5期17-19,23,共4页
Electronic Science and Technology
