期刊文献+

基于补偿电路的SRAM读操作跟踪电路设计

SRAM read tracking circuit design based on compensation circuit
下载PDF
导出
摘要 在传统静态随机存储器(SRAM)读操作跟踪电路中,生产工艺和温度的偏差会直接影响到对SRAM中存储数据的正确读取。因此,在本文中,我们采用工艺拐点补偿和温度补偿的方法,设计出了新型SRAM读操作跟踪电路。所设计跟踪电路,通过在不同工艺拐点和不同温度的情况下,对时序追踪字线DBL补偿不同大小的电流,从而减小灵敏放大器输入位线电压差对工艺拐点和温度的敏感度。有效减小了工艺拐点和温度对于SRAM读操作的影响,提高了SRAM的良率。基于SMIC 40nm CMOS工艺,对上述读操作跟踪电路进行了仿真,并且分别对补偿前后进行了10000次蒙特卡罗仿真与比较,仿真结果验证了所设计电路的可靠性和有效性。 In conventional SRAM read tracking circuit, process and temperature fluctuations may cause SRAM read failure. Thus, in this paper, a novel read tracking circuit of SRAM is put up using comer compensation technology and temperature compensation in this paper. The proposed tracking circuit compensates the dummy bit line for different current when working in different process corner and temperature condition, which dramatically reduce the impact of process comer and temperature, and enhance the yield of SRAM. The proposed circuit is simulated based on the SIMC's 40nm CMOS process, and the result proved the proposed circuit is valid and reliably.
出处 《电子设计工程》 2015年第9期8-11,共4页 Electronic Design Engineering
基金 国家自然科学基金资助项目(61272105)
关键词 静态随机存取存储器 工艺拐点补偿 温度补偿 读操作跟踪电路 蒙特卡罗 SRAM corner compensation temperature compensation read tracking circuit monte carlo
  • 相关文献

参考文献7

  • 1Raj B,Saxena A K,Dasgupta S. Nanoscale FinFET based SRAM cell design: analysis of performance metric, process variation, underlapped FinFET and temperature effect [J]. IEEE Circuits and Systems Magazine,2011:38-50.
  • 2Lai Y C, Huang S Y. Robust SRAM design via BIST-assisted timing-tracking (BATF) [J]. IEEE Journal of Solid-State Circuits,2009,44 (2):642-649.
  • 3Arslan U,Mccartney M P,Bhargava M,et al. Variation- tolerant SRAM sense-amplifier timing using eonfigurable replica bitlines [C]//IEEE 2008 Custom Integrated Circuits Conference. San Jose, America,2008: 415-418.
  • 4Nho H ,Yoon S S ,Wong S. S, et al. Numerical estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation[J]. IEEE Transactions on Circuits and Systems- II: Express Briefs,2008,55(9):907-910.
  • 5Yabuuchi M,Nii K,Tsukamoto Y,et al. A 45 nm low- standby-power embedded SRAM with improved immunity against process and temperature variations [C]/ilEEE Int. Solid-State Circuits Conf. San Francisco, America,2007: 326-327.
  • 6Bharadwaj, Amrutur S, Mark A. H. A Replica Technique for Wordline and Sense Control in Low-Power SRAM's[J]. IEEE Journal of Solid-State Circuits, 1998,33 (8): 1208-1.
  • 7ARIJIT B,MAHMUT E S,JOHN P,et al. A Reverse Write Assist Circuit for SRAM Dynamic Write VMIN Tracking using Canary SRAMs [C]//Quality Electronic Design (ISQED), 2014 15th International Symposium on. Santa Clara, CA,2014:1-8.

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部