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倒计数器测频电路的设计与实现

Design and implementation of frequency measuring circuit based on countdown counter
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摘要 将雷达发射脉冲信号下变频并整形形成中频TTL(晶体管-晶体管逻辑电路)方波信号,根据倒计数器测频的原理,选择二进制同步计数器74LS161三片级联后对该信号进行计数,取信号的300个脉冲形成计数区间,在此区间内用三片级联的74F161对100 MHz的标准方波进行计数,随后将计数结果送入单片机,由单片机计算出当前的中频频率,在控制DDS本振频率合成器对本振输出进行调整,保证中频信号频率稳定在规定范围内,由此构成数字式的雷达自动频率控制系统。 After down-conversion and shaping, the transmission pulse signal of radar turns to intermediate frequency TYL (Transistor-Transistor-Logic) square signal. This signal, on the basis of the frequency measuring principle of countdown counter, is counted by three pieces cascading of binary synchronous counter 74LS161. Three hundred pulses of the signal are chosen to form the counting section, in which the 100MHz standard square wa;ce is counted by 74F161 with three pieces cascading. Then the result is loaded into MCU. The MCU works out current IF-RE and controls the DDS local frequency synthesizer to adjust the local output, in order that the frequency of IF signal is stabilized in the specified scope. The digital automatic frequency control system of radar is constituted.
出处 《电子设计工程》 2015年第10期109-113,共5页 Electronic Design Engineering
关键词 倒计数法 频率测量 同步计数器 单稳态触发器 countdown method frequency measuring synchronous counter monostable trigger
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参考文献4

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二级参考文献1

  • 1[美]里恩(V·T· Rhyne) 著,苏进武.数字系统设计基础[M]上海科学技术出版社,1980.

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