基于FPGA的BPSK信号调制解调器的设计

A Design of BPSK Signal Modem Based on FPGA

文章从实际应用出发，设计了一款BPSK信号调制解调器，采用了数字costas环对载波进行同步，实现对BPSK信号的相干解调，并对算法进行VHDL实现，下载到FPGA中。实验结果表明，该调制解调器能在100ms内实现对3．125M载波的同步，同时输出解调的数据。通过软件参数的更改，此调制解调器可以适用不同的系统要求，具有一定的应用潜力。

This paper designs a BPSK signal modem from practical applications. The design employs digital cos- tas loop to perform cartier synchronization and to obtain coherent demodulation of BPSK signal, Then the algo- rithm is implemented in VHDL and is downloaded to FPGA. The experimental results indicate that the modem can synchronize 3. 125MHz carrier in lOOms and also export the data demodulated. Through the changes in soft- ware parameters, the modem can meet the different system requirements and has many potential applications.