高精度模拟分频电路的设计与实现

Design and Implementation of High-precision Analog Frequency Dividing Circuit

针对精密授时系统中,铷原子钟只提供单一的10 MHz高精度信号,而用FPGA等数字分频设计精度达不到要求的问题,设计了采用电阻、电容、电感与运算放大器等简单器件构成的高精度模拟分频电路。对高精度分频电路中各个模块的设计进行了详细的描述。通过测试,设计的一分频与二分频电路都能够使精度达到±5×10-11,这比一般的数字分频器要高几个数量级。

According to the problem that the rubidium-disciplined crystal oscillator provides only a single 10MHz high-precision signal in precision timing system and the accuracy of digital frequency divider is not up to the requirements designed by FPGA, a high-precision analog frequency dividing circuit consisted of simple device such as resistors, capacitors, inductors and the operational amplifiers is designed. The design of each module in high- precision frequency dividing circuits is described in detail. Through testing, the design of a divider and two divider are able to achieve accuracy ±5 ×10-11, which is several orders of magnitude higher than the average digital divi- der.