基于Avalon-MM突发传输的PCI从接口设计

Design of PCI Slave Interface Based on Avalon-MM Burst Transfer

PCI总线协议使用广泛,但协议内容较复杂,利用Altera公司提出的Avalon总线结构,实现方法简单,性能较好。设计一种基于Avalon-MM突发模式的PCI从接口结构,对Avalon-MM突发模式的读、写传输时序进行了简要介绍。根据Avalon-MM总线的时序要求,实现一种符合时序规范的RAM控制器,通过该控制器,PCI从接口可与RAM进行高速数据交换,通过PCI从接口,实现了PCI主外设与FPGA内部RAM的高速数据交换。经FPGA验证PCI从接口满足Avalon总线规范的时序要求,达到了预定的目标。

The PCI bus protocol is widely used but complicated,while the Avalon bus specification proposed by Altera can be easily implemented with high performance. A structure of PCI slave interface based on Avalon-MM burst mode is proposed, and the sequences of writing and reading based on Avalon-MM burst transfer are introduced.According to the sequences of Avalon-MM,a RAM controller conforming to sequential specification is implemented,by which the PCI slave interface can achieve high-speed data exchange with RAM.By the PCI slave interface,high-speed data transmission is achieved between the PCI master peripheral equipment and RAM in FPGA.The FPGA verification result shows that the proposed PCI slave interface scheme can satisfy the requirement of Avalon bus specification.