摘要
基于SMIC 180 nm混合信号CMOS工艺,实现了一种应用于音频信号的16 bit四阶级联Sigma-Delta ADC。其过采样率为64,信号带宽为20 k Hz。数字滤波器采用CIC抽取滤波器、CIC补偿滤波器及半带滤波器级联实现,其通带纹波小于0.01 dB,阻带衰减达到-100 dB。在1.8 V电源电压下,该ADC整体功耗约为2.34 mW。信噪失真比可达95.9 dB。
A 4th-order 2-stage cascade audio sigma delta A/D converter was designed and implemented in SMIC 180 nm CMOS technology. The over-sampling ratio was 64, and the signal-bandwidth was 20 kHz. The digital filter adopted a cascade of CIC ,CIC compensate and half-band filter, which was featured ripples within ±0.001 dB in the pass band and -100 dB attenuation in the stop band. The AI）C consumed 2.34 mW of power under the 1.8 V supply. It achieved a performance of 95.9 dB SNDR.
出处
《电子技术应用》
北大核心
2015年第6期47-50,共4页
Application of Electronic Technique
基金
科技部科技型中小企业技术创新项目(14C26213201041)
