摘要
文中详细阐述了基于FPGA利用Quartus II实现DDS(直接数字频率合成器)模块的方法。根据DDS原理对其进行系统建模,采用verilog HDL语言实现各个模块的功能,并且在开发环境下进行了仿真。该信号源可以输出方波、三角波以及正弦波三种波形,其与传统的信号源相比较,具有波形质量好、精度高、设计方案简洁、易于实现、便于扩展与维护的特点。
This paper expounds the method of implementing DDS (direct digital frequency synthesizer) modulc by use of Quartus II based on FPGA. System modeling is firstly conducted according to the principle of DDS. The function of each module is then realized using verilog HDL language. And simulation under development environment is also done. The signal source can output square wave, triangle wave and sine wave, and have features of better wave quality, higher precision, more simple scheme, easier implementation, more convenient expansibility and maintenance when compared with traditional signal sources.
出处
《通信电源技术》
2015年第2期38-39,65,共3页
Telecom Power Technology
关键词
直接数字频率合成器
信号源
现场可编程门阵列
direct digital frequency synthesizer (DDS)
signal source
Field-Programmable Gate Array(FPGA)