基于DSP的高动态锁相环的实现

Implementation of High-Dynamic Phase Locked Loop (PLL) Based on DSP

文中介绍了常见锁相环的基本结构,分析了相位检测器、环路滤波器和压控振荡器的执行情况。PLL环路滤波器的系统函数表明,环路滤波器的性能基本上决定了锁相环的质量。侧重于环路滤波器的设计,结合锁相在高动态GPS接收机环路中的应用,提出了在高动态环境中,一种两相锁频环辅助三相锁相环数字滤波器的细节。模拟结果表明,该锁相环的性能比普通PLL已大大改善,并完全符合高动态信号跟踪的要求。

This paper introduces the basic structure of common phase-locked loop, and analyzes implementation of phase detector, loop filter and VCO. System function of PLL loop filter shows that the performance of loop filter basically determines the quality of phase-locked loop. Focusing on the loop filter design, combined with application of PLL in loop of high-dynamic GPS receiver, details of a digital filter in highly dynamic environment with two-phase frequency locked loop aiding a three-phase phase-locked loop are presented. The simulation results show that the proposed PLL has much better performance than common PLL, and is in full compliance with the requirements of high dynamic signal tracking.