低功耗芯片级原子钟物理系统热分析

Thermal Analysis of the Low-Power Consumption Physics Package for a Chip-Scale Atomic Clock

对一种基于玻璃隔热桥结构芯片级原子钟物理系统进行了热学分析。通过理论方法对真空下无封装外壳物理系统各个导热路径进行了分析,同时用有限元方法分析了镀金涂层对其功耗的影响,并且进行了实验验证。实验表明:无封装外壳情况下,在工作区部分外表面镀金涂层可以使物理系统总功耗从93.6 mW降低到72.4 mW,实验值与有限元仿真结果一致。最后对真空下有封装外壳物理系统进行了有限元仿真,仿真结果表明:给工作区部分外表面镀金涂层物理系统盖上封装外壳,可以使物理系统总功耗降低至57.2 mW,在基座和封装外壳内表面都镀上金涂层可以使物理系统总功耗进一步降低至34.8 mW。

The thermal analysis was made for the physics package of the chip-scale atomic clock- based on the glass insulating bridge structure. The each thermal path of the physics package without the package enclosure in vacuum environment was analyzed by theory method, at the same time the influence of a gold coating on its power consumption was analyzed by the finite element method, and the experimental verification was carried out. The experimental results show that a gold coating placed on the part surface of workspace can reduce the total power consumption of physics package from 93.6 mW to 72.4 mW without the package enclosure, and the experimental results are in agreement with the finite element simulation results. Finally, the physics package with package enclosure in vacuum environment was simulated by the finite element method. The simulation results show that covering package enclosure on the physics package with the part surface of workspace placed a gold coating can reduce the total power consumption of the physics package to 57.2 mW, and the gold coating on the inner surface of the substrate and package enclosure can further reduce the total power consumption of the physics package to 34. 8 mW.