基于FPGA的页快速命中的SDRAM控制器的设计

Design for FPGA-based SDRAM controller of page fast hitting

深入探讨SDRAM的工作原理和工作时序,通过SDRAM三种常用寻址方式的对比,设计一种基于FPGA的页快速命中寻址的16位SDRAM控制器。软件仿真、硬件测试及实物调试结果表明:该控制器能极大地缩短寻址时间,并具有良好的实时性、高效性和模块重用性;同时也节省了FPGA的内部资源,缩短了研发周期。

In this paper, working principle and time sequence analysis of SDRAM are discussed deeply. By comparing three common addressing modes, a 16-bit SDRAM controller of page fast hitting based on FPGA was designed. Results of soft- ware simulation, hardware test and practical debug show that the controller can shorten addressing time greatly. The controller has good real-time performance, high efficiency and module reusability. It also can save internal resources in FPGA and reduce development cycle.