基于FPGA的时间数字转换器的编码器

FPGA- based Encoder of Time to Digital Converter

时间数字转换器的编码器需要把温度计码转换1-0(0-1)跳变处的二进制位置码。针对FPGA的查找表结构,实现了处理任意2m位温度计码的3种行为级编码器(顺序查找法、折半查找法和累加法)和4种数据流级编码器(wallace树、胖树、MUX和ROM)的算法描述,并在EP3C25E144I7中实现。通过对比编码器的LUT使用个数、最短路径延时、最长路径延时和毛刺,发现在FPGA上性能相近且最优的是胖树结构和ROM结构的编码器。ROM结构比胖树结构更易于被编程实现和移植。

Time to digital converter encoder needs to transform the 1- 0（ 0- 1） jump in thermometer code to the binary position code. For the lookup table structure of FPGA,it describes 3 behavior- level encoders（ sequential search method,the binary search and accumulation method） and 4 dataflow- level encoders（ Wallace tree,fat tree,MUX and ROM） algorithm,and implements in the EP3C25E144I7. By comparing the number of LUT,the shortest path delay,the longest path delay and noise,it is found that fat- tree and ROM encoder achieve the best performance on the FPGA,and have the similar performance. ROM encoder is easier to be programmed and transplanted. than fat- tree encoder.