3Ouali J, Saucier G. Fast Generation of Neuro - ASICs[C]. Proc. Int. Neural Networks Conf. , 1990,2 : 563 - 567.
4Deprettere E,Dewilde P, Udo P. Pipelined CORDIC Archi tectures for Fast VLSI Filtering and Array Processing[C]. Proc. Int. Conf. Acoust, Speech, and Signal Proc. , 1984 : 41 A. 6.1--41. A. 6.4.
5Javier Vails. Evaluation of CORDIC Algorithms for FPGA Design[J]. Journal of VLSI Signal Processing, 2002, 32: 207 -222.
6Jordan L Holt,Jenq-Neng Hwang. Finite Precision Error Analysis of Neural Network Hardware Implementations[J].IEEE Ttransactions on Computers,1993,42(3) :281 - 290.
