基于FPGA的信号量管理模块的设计

Design of Semaphore Management Module Based on FPGA

针对软件实时操作系统的开销给嵌入式系统带来性能退化的问题,提出了基于FPGA的硬件实时操作系统的方案,设计了一个硬件信号量管理模块并用Verilog HDL硬件描述语言进行描述。仿真结果验证了这一设计的正确性,且其创建、请求和发送信号量操作的执行速度比μC/OS-Ⅱ中信号量管理部分明显提高。

Aim at traditional software real-time operating system leads to performance degradation for embedded system based on FPGA,a hardware real-time operating system was proposed,a semaphore management module was designed with Verilog HDL hardware description language for description.Results of Functional simulation verify that the designed module was correct,and its process was faster than that ofμC/OS-Ⅱin create,pend and post operation.