摘要
基于MSK调制通信系统,采用四阶差分定时误差检测算法对基于插值的定时同步环路进行了研究和分析,并提出了一种以插值输出信号均方误差最小为准则的插值滤波器设计,提高滤波器输出精度,改善定时同步环路同步性能。通过MATLAB仿真验证,与Lagrange插值滤波器相比,基于最小均方插值的定时同步算法,跟踪阶段定时抖动小,对噪声具有抑制作用,在信噪比较低的情况下也具有较好的同步性能。
Based on MSK (Minimum Shift Keying) communication system, four-order differential algorithm of timing error detection is applied to researching and simulating interpolation-based timing synchronization loop, and a design on interpolation filter with minimum mean square error of interpolation output signal is proposed to improve the accuracy of filter and the performance of timing synchronization loop. MATLAB sim- ulation indicates that, compared with the Lagrange interpolation filter, the timing synchronization based on MMSE (Minimum Mean Square Error) interpolator enjoys small timing jitter in tracking process, and is of better anti-jamming ability and better synchronization performance in low SNR condition.
出处
《通信技术》
2015年第7期780-783,共4页
Communications Technology