期刊文献+

基于现场可编程门阵列的高速多通道并行测量系统设计 被引量:1

The Design of High-Speed Multi-Channel Parallel Measurement System Based on Field Programmable Gate Arrays
下载PDF
导出
摘要 本文以线圈靶作为传感器,设计了一种可应用于"金属风暴"类多管阵列高射频火炮的新型并行测速测频装置.此系统通过多路并行设置线圈靶传感器感知信号;由多路信号调理电路对信号进行行运放滤波,再通过高速AD芯片和具有并行处理能力的FPGA芯片进行多路信号采集存储,最后由上位机软件进行速度值和射频值的计算显示,从而完成对弹丸初速及射频的测量.为了验证此新型测量系统的可行性,进行了双通道测量试验,试验表明该系统不仅具有稳定的精确测速功能,还具有精确的射频测量功能. In this paper,a high-speed multi-channel parallel measurement system has been designed,which uses the coil targets as sensors and aims at measuring the projectile speed and firing frequency of array gun-barrel weapon with high firing frequency just like the " Metal Storm".Firstly,the measurement system obtains the original speed signal by the parallel-set coil target sensors,and then a multichannel signal conditioning circuit amplifies the signal and filter out the clutter.After that,high performance ADC and the FPGA which has parallel processing capabilities are in charge of signal acquisition and storage parallel.At last,after the programmed PC software calculates and displays the speed and firing frequency value,the measurement process would be finished.In order to verify performance of this new measurement system,a dual-channel test experiment was conducted.Experimental results shows this system can not only stably achieve speed measurement,but also precisely give out the firing frequency value.
出处 《测试技术学报》 2015年第4期303-308,共6页 Journal of Test and Measurement Technology
关键词 弹丸速度 射频 FPGA 高速AD projectile velocity firing frequency field programmable gate arrays high speed AD
  • 相关文献

参考文献6

二级参考文献118

  • 1王相綦,何宁,冯德仁.基于CPLD﹑单片机和网络的固态调制器触发控制[J].核技术,2006,29(4):241-244. 被引量:5
  • 2张良,秦玲,刘承俊,章林文.多通道可调脉宽脉冲发生器设计[J].电子技术应用,2007,33(5):29-31. 被引量:4
  • 3Slimane-Kadi M, Brasen D, and Saucier G. A fast-FPGA prototyping system that uses inexpensive high-performance FPIC. Proc. 2nd Annual Workshop on FPGAs, Berkeley, 1994: 147-156.
  • 4Chinnery D and Keutzer K. Closing the Gap Between ASIC and Custom Tools and Techniques for High-Performance ASIC Design. Netherland: Kluwer Academic Publishers, 2002 157-158.
  • 5Altera Corporation. Hardcopy series handbook, http://www. altera.com.cn/literature/hb/hrd/hc_handbook.pdf, 2008, 9.
  • 6Kuon I and Rose J. Measuring the gap between FPGAs and ASICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2007, 26(2): 203-215.
  • 7Hamdy E and McCollum J, et al.. Dielectric based antifuse for logic and memory IC. International Electron Devices Meeting Technical Digest, San Francisco, 1988: 786-789.
  • 8Birkner J and Chan A, et al.. A very-high-speed field-programmable gate array using metalto-metal antifuse programmable elements. Microelectronics Yournal, 1992, 23(7): 561-568.
  • 9Birkner J and Chua H T. Programmable array logic circuit. U.S.Patent, 4124899, 1978.
  • 10Brown S and Rose J. FPGA and CPLD architectures. A tutorial. IEEE Design and Test of Computers, 1996, 12(2): 42-57.

共引文献231

同被引文献5

引证文献1

二级引证文献2

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部