期刊文献+

n型纳米非对称DG-TFET阈值电压特性研究

Study on Threshold Voltage Characteristics of the n-Type Nanoscale Asymmetric DG-TFET
下载PDF
导出
摘要 n型纳米非对称双栅隧穿场效应晶体管(DG-TFET)速度快、功耗低,在高速低功耗领域具有很好的应用前景,但其阈值电压的表征及其模型与常规MOSFET不同。在深入研究n型纳米非对称DG-TFET的阈值特性基础上,通过求解器件不同区域电场、电势的方法,建立了n型纳米非对称DG-TFET器件阈值电压数值模型,探讨了器件材料物理参数以及漏源电压对阈值电压的影响,通过与Silvaco Atlas的仿真结果比较,验证了模型的正确性。研究表明,n型纳米非对称DG-TFET的阈值电压分别随着栅介质层介电常数的增加、硅层厚度的减薄以及源漏电压的减小而减小,而栅长对其阈值电压的影响有限。该研究对纳米非对称DG-TFET的设计、仿真及制造有一定的参考价值。 The n-type nanoscale asymmetric double gate tunneling field effect transistor (DG- TFET) has advantages in terms of higher speed and lower power consumption, and has been proposed as a substitute or complement for high speed and low power consumption applications. But the threshold voltage characteristic of the DG-TFET is very different from that of the MOSFET. Firstly, the threshold voltage characteristic of n-type nanoscale asymmetric DG-TFET was studied, and then a threshold voltage model of n-type nanoscale asymmetric DG-TFET was presented by solving the distributions of potential and electric field in different regions. By analyzing the model, the effect of device parameters and drain- source voltage on the threshold voltage was discussed. The results from the model were compared with the silvaco Atlas simulation results and it was found out that they are in excellent agreement with each other. The results show that the threshold voltage of n-type nanoscale asymmetric DG-TFET decreases when the dielectric constant of gate dielectric increases, the thickness of Si layer decreases, and the drain-source voltage decreases, respectively, and remain unchanged for a large range of the gate length. The pro- posed model can be easily used for reasonable analysis, design and fabrication of nanoscale asymmetric DG-TFET.
出处 《半导体技术》 CAS CSCD 北大核心 2015年第8期585-591,共7页 Semiconductor Technology
基金 国家自然科学基金资助项目(61474085) 西安科技大学博士启动金资助项目(2014QDJ035)
关键词 双栅隧穿场效应晶体管(DG-TFET) 带带隧穿 亚阈值摆幅 阈值电压 纳米非对称结构 double-gate tunneling field effect transistor (DG-TFET) band-to-band tunneling subthreshold swing threshold voltage nanoscale asymmetric structure
  • 相关文献

参考文献12

  • 1ASRA R, SHRIVASTAVA M, MURALI K V R M, et al. A tunnel FET for VDD Scaling Below 0.6 V with a CMOS-comparable performance [ J]. IEEE Transactions on Electron Devices, 2011, 58 (7) : 1855-1863.
  • 2AYDIN C, ZASLAVSKY A, LURYI S, et al. Lateraq interband tunneling transistor in silicon-on-insulator [ J ].Applied Physics Letters, 2004, 84 (10): 1780-1782.
  • 3APPENZELLER J, LIN Y M, KNOCH J, et al. Band- to-band tunneling in carbon nanotube field-effect tran- sistors [J]. Physical Review Letters, 2004, 93 (19): 196805-1-196805-4.
  • 4KNOLL L, QING T Z, NICHAU A, et al. Inverters with strained Si nanowire complementary tunnel field- effect transistors [ J]. Electron Device Letters, IEEE, 2013, 34 (6): 813-815.
  • 5DEY A W, BORG B M, GANJIPOUR B, et al. High- current GaSb/InAs (Sb) nanowire tunnel field-effect transistors [ J]. IEEE Electron Device Letters, 2013, 34 (2): 211-213.
  • 6ZHAN Z, QIAN Q H, RU H, et al. A tunnel-induced injection field-effect transistor with steep subthreshold slope and high on-off current Letters, 2012, 100 (11): ratio [ J]. Applied Physics 113512-113514.
  • 7TOMIOKA K, YOSHIMURA M, FUKUI T. Steep-slope tunnel field-effect transistors using III-V nanowire/Si heterojunctlon [ C ] //Proceedings of VLSI Technology (VLSIT). Honolulu, HI, USA, 2012: 47-48.
  • 8王斌,张鹤鸣,胡辉勇,张玉明,周春宇,王冠宇,李妤晨.The effect of substrate doping on the flatband and threshold voltages of a strained-Si pMOSFET[J].Chinese Physics B,2013,22(2):539-544. 被引量:1
  • 9XIAO Y L, JIN F K, LEI S, et al. Threshold vohage model for MOSFETs with high-k gate dielectrics [ J ]. IEEE Electron Device Letters, 2002, 5 (23): 270- 272.
  • 10BOUCART K, IONESCU A M. A new definition of threshold voltage in tunnel FETs [ J]. Solid-State Elec- tronics, 2008, 52 (9): 1318-1323.

二级参考文献17

  • 1Wu T F, Zhang H M, Wang G Y and Hu H Y 2011 Acta Phys. Sin. 60 027305 (in Chinese).
  • 2Song] ] , Zhang H M, Hu H Y, Dai X Y and Xuan R X 2007 Chin. Phys. 163827.
  • 3Li G] , Lai H K, Li C, Chen S Y and Yu] Z 2008 Chin. Phys. B 17 3479.
  • 4Zhang Z F, Zhang H M, Hu H Y, Xuan R X and Song J J 2009 Acta Phys. Sin. 584648 (in Chinese).
  • 5Maiti C K 2007 International Workshop on Physics of Semiconductor Devices (IWPSD'07), December 16-20, 2007, Bombay, India, p. 55.
  • 6Li B, Liu H X, Yuan B, Li J and Lu F M 2011 Acta Phys. Sin. 60 017202 (in Chinese).
  • 7Q S S, Zhang H M, Hu H Y, Wang G Y, Wang X y, Qu J T and Xu X B 2011 Sci. Chin.: Phys. Meek. Astron. 542181.
  • 8Flachowsky S, Wei A, Illgen R, Herrmann T, Hontschel J, Horstmann M and Klix W 2010 IEEE Trans. Electron Dev. 57 1343.
  • 9Bera L K, Mathew S, Balasubramanian N, Braithwaite G, Currie M T and Singaporewala F 2004 Appl. Surf. Sci. 224 278.
  • 10Liao J H, Canonico M, Robinson M and Schroder D 2006 ECS Trans. 31211.

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部