摘要
PCI Express 3.0是最新的高速数据传输协议。本文介绍了基于FPGA的PCI Express 3.0的高速传输系统的DMA控制器结构,并详细说明了DMA控制器的逻辑设计。DMA控制器基于Xilinx公司的Virtex-7 FPGA Gen3 Integrated Block for PCI Express硬核开发,封装成标准FIFO结构,这样可以方便地连接采集数据源和回放目标系统。为了验证设计的功能及可靠性,本文搭建了基于PCI Express 3.0 x8通道的高速采集回放验证系统。实验表明,DMA控制器达到设计指标。当DMA传输大小为16MB时,8通道的DMA读/写速度均能达到4900 MBytes/s,可满足大部分超高速数据采集回放系统传输的需要。
This paper introduces a new structure of DMA controller based on FPGA high speed transmission system with PCI Express 3.0, explains the logical design of DMA controller in detail and packages it into a standard FIFO structure, which can conveniently adopt to data acquisition or playback system. In order to verify the function and reliability of the design, a high-speed data acquisition and playback system based on PCI Express 3.0 X8 channel is built. The experiments show that the performance of the system has achieved the design specifications. The read/write speed of PCI Express 3.0 X8 channel DMA controller can reach 4,900MBytes/s when the size of the DMA is 16MB, which can meet the transmission needs of most of the high-speed data acquisition and playback systems.
出处
《数字技术与应用》
2015年第8期3-7,共5页
Digital Technology & Application