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基于FPGA的通用PCM接收解码电路的设计 被引量:2

The Design of General PCM Receiving and Decoding Circuit
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摘要 为了准确接收提取某遥测系统的PCM数据,设计了基于FPGA的通用PCM接收解码电路,该电路通过基于锁相环的位同步器实现不同码率的PCM数据流接收,通过三态搜索理论的帧同步器可判别不同帧结构数据,码型转换模块识别并转换NRZ-L/M/S、BiФ-L/M/S 6种码型,最后电路将解调出的数据通过USB接口传送至计算机进行存储、显示和处理。该电路可识别码型不同、码速率不同以及帧同步码组不同的PCM数据流,兼有单端和差分输入接口,在遥测领域具有很强的通用性。 In order to accurately extract the PCM( Pulse Code Modulation) data received from a telemetry system,a common PCM receiving and decoding circuit based on FPGA is designed. The circuit can receive PCM data of different rate by using the bit synchronizer based on phase-locked loop. Its frame synchronizer is based on three-state searching theory so that it can distinguish the data with different structure. The code converter module can convert the six patterns that is NRZ-L / M / S,BiФ-L / M / S. At last the demodulated data is sent to the computer through the USB interface for storage,display and processing. The decoding circuit can identify PCM data stream which has different rates,different patterns and different frame synchronizing code groups. It has both single-ended and differential input interfaces,so it has strong versatility in the field of telemetry.
出处 《电子器件》 CAS 北大核心 2015年第3期543-547,共5页 Chinese Journal of Electron Devices
关键词 PCM FPGA 通用 位同步 帧同步 PCM FPGA general bit synchronize frame synchronize
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