摘要
Abstract:A low-delay loop detection algorithm for bit-flipping based iteration LDPC decoding is proposed.By introducing the concept of loop characteristic,only the iteration steps with loop characteristics are detected and labeled for the subsequent loop detection.As a result,computation delay is greatly reduced.Furthermore,the position vector for the selected iteration steps is also established to implement loop detection for these iteration steps,which reduces the hardware cost of the loop detection as well.The validity of the proposed algorithm is verified by simulations.
A low-delay loop detection algorithm for bit-flipping based iteration LDPC decoding is proposed. By introducing the concept of loop characteristic, only the iteration steps with loop characteristics are detected and labeled for the subsequent loop detection. As a result, computation delay is greatly reduced. Furthermore, the position vector for the selected iteration steps is also established to implement loop detection for these iteration steps, which reduces the hardware cost of the loop detection as well. The validity of the proposed algorithm is verified by simulations.
出处
《中国电子科学研究院学报》
北大核心
2015年第4期341-343,349,共4页
Journal of China Academy of Electronics and Information Technology
基金
National Science Foundation of China(No.61072069)
the 111 Project(B08038)
