摘要
SURF算法广泛用于目标检测、跟踪和匹配等视频图像处理领域,但其计算复杂度高,在通用CPU上计算速度慢、实时性差,但SURF特征提取算法具备良好的可并行性.因此,根据现场可编程门阵列(FPGA)支持细粒度并行的特点,基于HLS(High-level Synthesis)设计并实现了适合FPGA的SURF特征提取硬件加速单元.实验结果表明,相比通用CPU,基于FPGA的SURF特征提取加速效果明显;相比HDL方式,基于HLS设计算法开发效率高、可移植性好.
SURF (Speeded up robust features ) detection is used extensively in object detection,tracking and matching.However, it is computationally expensive and has poor real-time performance in general-purposed processors.Fortunately,SURF detection has high parallelism to be exploited.In this paper,hardware accelerator of SURF detection is implemented based on HLS to be executed on FPGAs.Experimental results show that SURF detection on FPGAs is much faster than that on CPUs.Furthermore,HLS is more productive and with better portability than traditional HDLs.
出处
《微电子学与计算机》
CSCD
北大核心
2015年第9期133-137,143,共6页
Microelectronics & Computer
基金
国家自然科学基金(61170121)
高等学校学科创新引智计划(B12018)