Fermi level pinning effects at gate–dielectric interfaces influenced by interface state densities

The dependences of Fermi-level pinning on interface state densities for the metal-dielectric, ploycrystalline silicon-dielectric, and metal silicide-dielectric interfaces are investigated by calculating their effective work functions and their pinning factors. The Fermi-level pinning factors and effective work functions of the metal-dielectric interface are observed to be more susceptible to the increasing interface state densities, differing significantly from that of the ploycrystalline silicon-dielectric interface and the metal silicide-dielectric interface. The calculation results indicate that metal silicide gates with high-temperature resistance and low resistivity are a more promising choice for the design of gate materials in metal-oxide semiconductor（MOS） technology.